In recent years, unconventional nonvolatile memory (NVM) devices, such as ferroelectric random access memory (FRAM) devices, phase-change random access memory (PRAM) devices, and resistive random access memory (RRAM) devices, have emerged. In particular, RRAM devices, which exhibit a switching behavior between a high resistance state (HRS) and a low resistance state (LRS), have various advantages over conventional NVM devices. Such advantages include, for example, compatible fabrication steps with current complementary-metal-oxide-semiconductor (CMOS) technologies, low-cost fabrication, a compact structure, flexible scalability, fast switching, high integration density, etc.
In general, an RRAM device includes a lower electrode (e.g., an anode) and an upper electrode (e.g., a cathode) with a variable resistive material layer interposed therebetween. The existing RRAM device is typically formed by sequentially depositing plural layers to form the lower electrode, the variable resistive material layer, and the upper electrode, and then etching the plural layers all together, such that the respective lower and upper boundaries of the lower electrode, variable resistive material layer, and the upper electrode of the existing RRAM device are horizontally aligned with one another. Such a method to form an RRAM array that includes a plurality of arranged RRAM devices is typically subjected to the limit of a lithography technique used to define the pitch of each RRAM device of the RRAM array. Further, there exists multiple conductive pathways resulting in a difficult evaluation of device performances.
Thus, existing RRAM devices and methods to make the same are not entirely satisfactory.